Alibaba Cloud Fpga: the $200 Kintex Ultrascale+
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The Alibaba Cloud FPGA board, featuring a Kintex UltraScale+ chip, is available for $200 and has sparked interest in the HN community for its potential applications in hardware acceleration and custom computing.
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But with decent volume they get pretty cheap - for example there are video converters they have FPGAs in them that you can buy for less than you can buy the FPGA part in single qty - which means the manufacturer of the device is getting the FPGA for 5-10% of list price.
Meanwhile the list price from the manufacturer is $3, but it's completely impossible to order anything as an individual. Not sure why they designed a hobbyist beginner-friendly dev board around a part from a company that makes all their products impossible to buy...
https://docs.amd.com/r/en-US/ug908-vivado-programming-debugg...
They are super useful - they speak GPIO, I2C, SPI, parallel FIFO, etc.
And their pyFTDI Python lib is great.
Usually better to use the vendor supplied JTAG tools, or build your own with known good silicon. Recovering FPGA hardware is always a mixed bag of what IP and documentation is available to bring up the board. Looks like nice silicon though. =3
Same for ST. Only the STM32F103 is a well known bad actor in the market.
90% of the standard stuff will work. But as soon as you dig into the exotic modes bad things will happen.
Specifically, the FT232RL - a simple USB-to-serial chip. (And many of the clones are actually quite high quality.) As far as I'm aware, the FT2232H - a more complex USB to various-serial-and-parallel-protocols chip - hasn't had a counterfeiting problem, although I believe WCH has made some compatible parts.
The STM32F103(C8) situation is pretty funny too. Most of the companies making clones have long since moved on from outright counterfeits and have started manufacturing their own more-or-less-compatible XYZ32F103 microcontrollers (e.g. GD32F103, AT32F103, APM32F103, CH32F103, HK32F103, etc).
Retro computer eMMC memory-recovery hardware like the xgecu T76 is a USB3.0 device with built in FPGA and gpio voltage-level-shifters. It may eventually solve a lot of the hobby diagnostic/recovery tool issues, but the Beta software is currently Windows only. There is a FOSS project that should port to Linux and MacOS systems soon:
https://gitlab.com/DavidGriffith/minipro.git
Keep in mind, the software is still being built, but I'd keep an eye open for full-speed JTAG support releases in the next year or so. YMMV Best regards =3
[1]: https://glasgow-embedded.org/
Sending it back only punishes the OEM you bought the weird niche thing off, and they likely had no indication that the chips they paid genuine prices for were counterfeit. If they try to get a refund from Alibaba or DigiKey or whoever, they'll politely be told to fuck off, if they get a response at all.
I totally understand why FTDI chose to take this path, but I also think it was a poor choice overall and I now avoid FTDI products (which back in the day I happily used, before all this) just in case I get caught up in the BS.
[0] Clearly allowed at least in the US under the decision in Sega v. Accolade
> lsusb
or
C:\> Get-PnpDevice -PresentOnly | Where-Object { $_.InstanceId -match '^USB' } | Format-List
are considered copyrighted IP in North America. Many of the paid device codes are often not like other Communication Device Class drivers or free generic HID devices listed in the USB standard.
Early next year Windows 11 will be locking out unsigned drivers from the OS. Good for keeping the kernel more consistent, but could be bad for hobby hardware drivers.
Personally, I think it is ludicrous, but for 83% of users they have no other option than pay $6.32 for a $$0.43 chip. =3
I do agree the cost of the chips are insane however, they're ultimately worth paying for because of the driver support and 'just works' factor.
Sure, anyone paying for a Microsoft certified hardware driver, USB PID allocation, and cert fees every year... Everyone else is not allowed in the OS we paid for...
It is a decades old serial port emulation chip... Racketeering with a computer should still be illegal. =3
That's been the case since Windows 7 for 64-bit drivers, hasn't it? What's changing with 11?
This is apparently being done to improve kernel security and reliability. It could be a PR disaster depending how it is rolled out...
People can blame things like the old generic PC-case-bling LED driver CVE people and even its original author lost patience with years ago... lol =3
Again, that's been the case since Windows 7. You have to go out of your way to boot the system in "Test Mode" to install an unsigned driver. Either that, or use Zadig to self-sign the driver. (Maybe they're no longer allowing that?)
Signatures were enforced only for 64-bit drivers in Windows 7, but Windows 10 enforces them for all drivers.
https://windowsforum.com/threads/windows-driver-signing-bala...
We won't know the actual collateral damage till the update is released. =)
If it were free or cheap, than people would have just started another domain squatting business. That could have been far worse. =3
Yes they may be, but in the Sega v. Accolade case I mentioned earlier it was decided that copying of both copyrighted and trademarked material for interoperability purposes is fair use. In that case Accolade had to literally embed "SEGA" inside their ROM and send the text to the Genesis III in order for it to boot their games. The Ninth Circuit court ruled that this constituted fair use.
Hence the current situation of many CDC-type devices that are intentionally incompatible enough with the standard, in order to require the device vendor's own drivers which they can ensure meet their quality expectations
"The CDC class has been implemented in Windows (since Windows 98), macOS and most Linux distributions. Since Windows 10, no extra information has to be given in the start-up sequence as the operating system now has a generic driver that will be used for CDC. To support older versions of Windows (Windows 7 and earlier), provide an .inf file that associates with the correct driver."
However, these will not support the high-speed bit-banged JTAG mode FTDI chips can perform with the right driver. =3
If you like FT2232, you’ll love the Tigard board that takes a FT2232H and adds level shifters and is basically as tricked out as you can make a FTDI adapter. https://github.com/tigard-tools/tigard
If you're happy to create your own debugging infrastructure (which isn't that hard - almost all FPGAs have at least two dedicated IR scancodes specifically for user applications) then you can use any JTAG dongle supported by OpenOCD.
Basically they achieved massive improvements in throughput and latencies vs RocksDB, for some operations even an order of magnitude.
They even offered this as a service, but eventually pulled out. Not sure if they are still using it, but I was surprised that pretty much nobody else, as far as I am aware, is using any hardware acceleration for repetitive database workloads.
A Kintel UltraScale+ is quite a prize though, really nice write up.
My back burner project for them is to create a PCIe TLP sniffer/MiTM/device emulator by hooking up two together via 10 GbE for relaying TLPs with one of the remaining 10 GbE connection going to a host PC for the sniffed/injected TLPs. The Aria 10 FPGA PCIe hard IP allows for either root or endpoint mode so I “just” need to draw the rest of the owl, avoiding any Quartus IP modules that would make the setup non-transparent.
I’m not sure what using a 10 Gbit link for PCIe will be like with faster devices but fail0verflow got away with TLP proxying with 115200 baud UART. [1]
[0]: https://www.ebay.com/itm/335904285904 [1]: https://fail0verflow.com/media/33c3-slides/#/11
But why? Are these boards frequently removed and physically moved around in data centers?
Or was that an eBay seller thing to protect it?
To bring them to the field, because they’re _field_ programable gate array
/s
I guess there aren't any GPIO's wired up to headers or such? Any suggestions on a project for it that's a good fit?
Probably not for long: only 7 available now...
dmesg log :
[ 0.388790] pci 0000:00:00.0: [14e4:2712] type 01 class 0x060400
[ 0.388817] pci 0000:00:00.0: PME# supported from D0 D3hot
[ 0.389752] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[ 0.495733] brcm-pcie 1000110000.pcie: link up, 5.0 GT/s PCIe x1 (!SSC)
[ 0.495759] pci 0000:01:00.0: [dabc:1017] type 00 class 0x020000
...
Since most people might not be intimately as familiar with PCIe terminology, allow me to quickly document what is going on here.
0000:00:00.0: is the identifier ...
[14e4:2712]: is the device’s [vendor id:device id], these vendor id identifiers are assigned by the PCI standard body to hardware vendors. Vendors are then free to define there own vendor id’s.
The full list of official vendor id’s and released device id can be found : https://admin.pci-ids.ucw.cz/read/PC/14e4 or in the linux kernel code...
"""
Wouldn't it be really nice if dmesg had more info about devices?
No, it wouldn't, that'd just make the kernel another 1.5MB larger. It's large enough as it is. And if there is a driver for the device, the driver will print more things anyway.
Remember you're dealing with low-level system interfacing here. You're expected to bring some knowledge.
It's inconvenient for hobbyists, sure, but for enterprise uses the cost of Vivado for a team is largely inconsequential (which I suspect is why they get away with this).
Just wonder - why are EDA tools just now starting to get HiDPI support? I’m pretty sure Altera, Xilinx/AMD, etc haven’t bought HiDPI monitors for their own developers!
What's exciting about FPGAs is that they make "custom" chips affordable for colleges and even individuals... At this point in time, with the AI world fixated on LLMs, it seems that there's an opportunity for small groups/individuals to use FPGAs to experiment with more animal-like ground-up approaches to intelligence.
FPGAs run at reduced clock speeds, but then again, you'd have to run the GPU or CPU at the same clock speed to obtain the same energy efficiency.
Do you mean as a specialized processor for high speed inference, or as if the neural net including weights was directly synthesized into the FPGA architecture?
Neither use case would be as powerful as other options. FPGAs don’t provide infinite leeway for implementing completely custom logic. They have a finite number of blocks that can be reconfigured in certain ways as synthesized by the software. This architecture isn’t a good fit for the large LLMs we think about which need a lot of high bandwidth memory access. You can connect an FPGA to high speed memory, but the current crop of GPUs are going to be much better at the job.
What's cool is that the Raspberry-PI V is just fast enough to run modern desktop software, including (ack!) Microsoft Teams. I was able to give a live demo of my FPGA design by sharing the desktop during a conference call.
My only complaint is, of course, lack of SoC documentation from Broadcom.
Say what you will about Intel, but they do provide full chip documentation if you go through their NDA process. With it, I made a very nice FPGA PCIe environment on Xeon Ivy Bridge: it let me save all of the PCI config registers, then reconfigure the FPGA, then reprogram them and have the chip show up on the bus without having to reboot the server or re-enumerate. The trick is to temporarily set the root complex bit to disable PCIe error detection during the reconfiguration process.
(Was using Altera Stratix-IIgx at the time).
There is possibly another way to this, but haven't tried it:
https://stackoverflow.com/questions/32334870/how-to-do-a-tru...
But even aside from that, with the documentation you have access to a lot of error reporting which is extremely useful during PCIe bring-up.
Unfortunately, we are unable to support individuals or smaller entities. Please reach out to your local Intel sales office for assistance.
Are we talking about the same Intel?
(This is the reply I got trying to sign their NDA in order to access datasheets. Even my 15-people employer wasn't worth their time.)
Anyway, the information for the PCIe registers is in documents like this:
https://theretroweb.com/misc/documentation/324642-003-67f43c...
…so the alternate option now is ASMedia USB4 chips…
SFP transceivers are just that- transceivers, they will spit out what you put in, so you could even build some interesting bespoke fiber optic signaling gear with these, and a PCIe backplane, or just solo.
This is only valid for ≤10Gbaud SFP(+) transceivers. SFP28 have CDR chips in them that will balk at doing anything other than supported rates, e.g. {25.78125, 26.5625, 27.952…} Gbd. Even supporting 10.3125Gbd is not a given.
(You can put other things on them, but you need to match a supported rate.)
This ai craze makes me think that:
- there's not much of a moat long term in inference hardware (can't comment about training)
- the models themselves are a commodity that can be swapped any day
- the products are coming but not at the pace one thought. It's been 3 years since Chatgpt launched and we still have no decent service where I can inject documents and ask questions.
Reminds me of recycling used Mining- or LED-Controllers as they can be bought on Ali and have quite capable FPGAs.
The ebay listing mentions 128 MB, but I wonder if this can be trusted since some other information in the "item specifics" overview is clearly bogus ("7-Function Digital Multimeter Shield").
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